A fast prototype for modeling IP cores using in SoC with UML Marte.

Benabdallah Ahcene Youcef, Boudour Rachid


The gap between production systems and technological development has been growing in recent times, leading to the reuse of predesigned and preverified components called Intellectual Property (IP). The growth of the latter is not going to happen without encountering some difficulties; we include among some a lack of standards for the implementation of IPs, making integration difficult, only one incentive to some types of hardware or software IPs and generally an incomplete development approach.            In this paper, we present a comprehensive approach for modeling an IPs starting from a metamodeling. The approach is based in a Model-Driven Engineering (MDA) methodology, used standards for SoC (Systems-on-Chip) specification, MARTE and Hardware Description Languages (HDLs).                       We illustrate our methodology in the case of USB 3.1, using Papyrus for modeling. Results are encouraging and show that the proposed approach allows creating cores of any size

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DOI: https://doi.org/10.31449/inf.v45i6.3675

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